<?xml version="1.0" encoding="UTF-8"?>
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  <title>rawsocket.cloud - bench notes on serial buses</title>
  <link href="https://rawsocket.cloud/" />
  <link rel="self" href="https://rawsocket.cloud/feed.xml" />
  <id>https://rawsocket.cloud/</id>
  <updated>2026-10-10T09:00:00Z</updated>
  <author><name>Ivo Kallas</name><email>ivo@rawsocket.cloud</email></author>
  <subtitle>UART, SPI, I2C, CAN and RS-485, measured on one bench in Tartu.</subtitle>
  <entry>
    <title>Two nodes at 1 Mbit/s that sampled the bit in different places</title>
    <link href="https://rawsocket.cloud/can-sample-point.html" />
    <id>https://rawsocket.cloud/can-sample-point.html</id>
    <updated>2026-10-10T09:00:00Z</updated>
    <published>2026-10-10T09:00:00Z</published>
    <category term="CAN" />
    <summary>Two controllers on one 1 Mbit/s segment sampling 125 ns apart, the time-quantum arithmetic behind it, and why 87.5 per cent is a default worth matching.</summary>
  </entry>
  <entry>
    <title>A 95-metre CAN trunk that went quiet when I pulled one terminator</title>
    <link href="https://rawsocket.cloud/can-no-terminator.html" />
    <id>https://rawsocket.cloud/can-no-terminator.html</id>
    <updated>2026-09-28T09:00:00Z</updated>
    <published>2026-09-28T09:00:00Z</published>
    <category term="CAN" />
    <summary>Seventeen nodes, 500 kbit/s and a missing 120 ohm resistor that failed long frames while short ones kept working.</summary>
  </entry>
  <entry>
    <title>A sensor that held the clock low for 1.4 ms</title>
    <link href="https://rawsocket.cloud/i2c-clock-stretch.html" />
    <id>https://rawsocket.cloud/i2c-clock-stretch.html</id>
    <updated>2026-08-05T09:00:00Z</updated>
    <published>2026-08-05T09:00:00Z</published>
    <category term="I2C" />
    <summary>A device stretching SCL after the address byte, and a master whose 25 microsecond timeout aborted the read halfway.</summary>
  </entry>
  <entry>
    <title>Two boards agreed at 9600 and argued at 115200</title>
    <link href="https://rawsocket.cloud/uart-baud-error.html" />
    <id>https://rawsocket.cloud/uart-baud-error.html</id>
    <updated>2026-06-11T09:00:00Z</updated>
    <published>2026-06-11T09:00:00Z</published>
    <category term="UART" />
    <summary>A 12 MHz crystal against an 11.0592 MHz one, a seven per cent divider error, and why the failures depended on the byte value.</summary>
  </entry>
  <entry>
    <title>310 pF of bus capacitance and the rise time I ignored</title>
    <link href="https://rawsocket.cloud/i2c-pullups.html" />
    <id>https://rawsocket.cloud/i2c-pullups.html</id>
    <updated>2026-03-02T09:00:00Z</updated>
    <published>2026-03-02T09:00:00Z</published>
    <category term="I2C" />
    <summary>Eleven devices and 1.8 kilohm pull-ups that passed at 100 kHz and corrupted the last acknowledgement at 400 kHz.</summary>
  </entry>
  <entry>
    <title>Four hundred metres of RS-485 and two grounds that disagreed</title>
    <link href="https://rawsocket.cloud/rs485-isolation.html" />
    <id>https://rawsocket.cloud/rs485-isolation.html</id>
    <updated>2025-11-19T09:00:00Z</updated>
    <published>2025-11-19T09:00:00Z</published>
    <category term="RS-485" />
    <summary>A link that logged errors only in the morning, and the ground-potential measurement that led to an isolated transceiver.</summary>
  </entry>
  <entry>
    <title>A SPI daisy chain where the last word came back short</title>
    <link href="https://rawsocket.cloud/spi-daisy-chain.html" />
    <id>https://rawsocket.cloud/spi-daisy-chain.html</id>
    <updated>2025-09-16T09:00:00Z</updated>
    <published>2025-09-16T09:00:00Z</published>
    <category term="SPI" />
    <summary>Three ADCs in series and a chip-select edge released 90 ns too early for the farthest device's top bits.</summary>
  </entry>
  <entry>
    <title>Every reading came back at exactly half: a CPHA mismatch</title>
    <link href="https://rawsocket.cloud/spi-mode-mismatch.html" />
    <id>https://rawsocket.cloud/spi-mode-mismatch.html</id>
    <updated>2025-07-08T09:00:00Z</updated>
    <published>2025-07-08T09:00:00Z</published>
    <category term="SPI" />
    <summary>A mode mismatch at 8 MHz that halved every value, and why slowing the clock made the wrong answer look plausible.</summary>
  </entry>
  <entry>
    <title>Three samples per bit are not evidence</title>
    <link href="https://rawsocket.cloud/analyzer-aliasing.html" />
    <id>https://rawsocket.cloud/analyzer-aliasing.html</id>
    <updated>2024-12-14T09:00:00Z</updated>
    <published>2024-12-14T09:00:00Z</published>
    <category term="instruments" />
    <summary>The first entry, and a confession: 24 MS/s against an 8 MHz clock, and four hours spent chasing a sampling artefact.</summary>
  </entry>
</feed>
